Part Number Hot Search : 
WDW3T 2508AF 4ALVCH16 42020 FG50N06L PCF8562 IDT77305 Y7C15
Product Description
Full Text Search
 

To Download PI6C4853111FAE Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1 ps8805b 04/18/06 pi6c4853111 block diagram features ? pin-to-pin compatible to ics853111-02 ? f max < 500mhz ? 10 pairs of differential lvpecl outputs ? selectable differential input pairs with single ended input option ? input clk accepts: lvpecl, lvds, cml, sstl input level ? output skew: 35ps (typ) ? operating temperature: -40 o c to 85 o c ? core power supply: 3.3v+/-10%, output power supply: 2.5v 5% & 3.3v 10% ? packaging (pb-free & green): 32-pin tqfp (fa) 2.5v/3.3v 500mhz low skew 1-to-10 differential to lvpecl fanout buffer with 2 to 1 differential clock input mux description the pi6c4853111 is a high-performance low-skew 1-to-10 lvpecl fanout buffer. the pi6c4853111 features two selectable differential clock inputs and translates to ten lvpecl outputs. the clk inputs accept lvpecl, lvds, cml and sstl signals. pi6c4853111 is ideal for clock distribution applications demanding performance and repeatability. pin confguration clk0 /clk0 clk_sel q0 /q0 0 1 q1 /q1 q2 /q2 q3 /q3 q4 /q4 q5 /q5 q6 /q6 q7 /q7 q8 /q8 q9 /q9 clk1 /clk1 v cco /q2 q2 /q1 q1 /q0 q0 v cco 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 v cco q7 /q7 q8 /q8 q9 /q9 v cco v cc clk_se l clk0 /clk 0 nc clk1 /clk 1 v ee q3 /q 3 q4 /q 4 q5 /q 5 q6 /q 6 06-0052
pi6c4853111 2.5v/3.3v 500mhz low skew 1-to-10 differential to lvpecl fanout buffer w/ 2 to 1 differential clock input mux 2 ps8805b 04/18/06 pin description (1) name pin # type description v ee 8 p connect to negative power supply clk_sel 2 i clock select input. when high, selects clk1 input. when low, selects clk0 input. lvcmos/lvttl level with 50k? pull down. clk0 3 i differential lvpecl clock input with 75k? pull-down /clk0 4 i inverting differential lvpecl clock input. defaults to v cc /2 if left foating. clk1 6 i differential lvpecl clock input with 75k? pull-down /clk1 7 i inverting differential lvpecl clock input. defaults to v cc /2 if left foating. nc 5 no connect v cco 9,16, 25,32 p output power pin v cc 1 p core power supply q3, / q3 24,23 o differential output pair, lvpecl interface level. q2, / q2 27,26 o differential output pair, lvpecl interface level. q1, / q1 29,28 o differential output pair, lvpecl interface level. q0, / q0 31,30 o differential output pair, lvpecl interface level. q9, / q9 11,10 o differential output pair, lvpecl interface level. q8, / q8 13,12 o differential output pair, lvpecl interface level. q7, / q7 15,14 o differential output pair, lvpecl interface level. q6, / q6 18,17 o differential output pair, lvpecl interface level. q5, / q5 20,19 o differential output pair, lvpecl interface level. q4, / q4 22,21 o differential output pair, lvpecl interface level. note: 1. i = input, o = output, p = power supply connection. pin characteristics symbol parameter conditions min. typ. max. units r input pullup/pulldown resistance 50 k? control input function table inputs outputs 0 clk0 1 clk1 06-0052
pi6c4853111 2.5v/3.3v 500mhz low skew 1-to-10 differential to lvpecl fanout buffer w/ 2 to 1 differential clock input mux 3 ps8805b 04/18/06 absolute maximum ratings (1) symbol parameter conditions min typ max units v cc supply voltage referenced to gnd 4.6 v v in input voltage referenced to gnd -0.5 v cc +0.5v v i out surge current 100 ma t stg storage temperature -65 150 o c v bb smk/source current, i bb -0.5 +0.5 ma ? ja package thermal resistance 86 ?c /watt ? jc package thermal resistance 12.7 ?c /watt note: 1. stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these ratings are stress specifca - tions only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the specifcations is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. operating conditions symbol parameter conditions min typ max units v cc power supply voltage 3.0 3.6 v v cco output power supply voltage 2.375 3.6 v t a ambient temperature -40 85 o c lvcmos/lvttl dc characteristics ( t a = -40 o c to +85 o c, v cc = 3.3v 5%, v cco = 2.5v 5% to 3.3v 10%) symbol parameter conditions min typ max units v ih input high voltage clk_sel 2 v cc +0.3 v v il input low voltage clk_sel -0.3 0.8 i ih input high current clk_sel v in = v cc = 3.6v 150 a i il input low current clk_sel v in = 0v, v cc = 3.6v -5 a 06-0052
pi6c4853111 2.5v/3.3v 500mhz low skew 1-to-10 differential to lvpecl fanout buffer w/ 2 to 1 differential clock input mux 4 ps8805b 04/18/06 ac characteristics ( t a = -40 o c to +85 o c, v cc = 3.3v 10%, v cco = 2.5v 5% to 3.3v 10%) symbol parameter conditions min typ max units f max output frequency 500 mhz t pd propagation delay (1) 4 ns tsk output-to-output skew (2) 35 60 ps t r /t f output rise/fall time 20% - 80% 150 700 ps odc output duty cycle f 400 mhz 45 55 % notes: 1. measured from the differential input to the differential output crossing point 2 defned as skew between outputs at the same supply voltage and with equal loads. measured at the output dif ferential crossing point lvpecl dc characteristics ( t a = -40 o c to +85 o c, v cc = 3.3v 10%, v cco = 2.5v 5% to 3.3v 10%) symbol parameter conditions min typ max units i ih input high current clk0, clk1 v in = v cc = 3.6v 150 a /clk0, /clk1 v in = v cc = 3.6v 150 a i il input low current clk0, clk1 v cc = 3.6v, v in = 0v -5 a /clk0, /clk1 v cc = 3.6v, v in = 0v -150 a v pp peak-to-peak voltage 0.3 1 v v cmr common mode input voltage (1) v ee +1.5 v cc v v oh output high voltage (2) vcco=2.5v or 3.3v v cco -1.4 v cco -0.9 v v ol output low voltage (2) vcco=2.5v or 3.3v v cco -2.0 v cco -1.7 v v swing peak-to-peak output voltage swing 0.6 1.0 v i ee power supply current @ 400 mhz 120 140 ma notes: 1. for single-ended applications, the maximum input voltage for clk and /clk is v cc +0.3v 2. outputs terminated with 50 to v cc -2.0v 06-0052
pi6c4853111 2.5v/3.3v 500mhz low skew 1-to-10 differential to lvpecl fanout buffer w/ 2 to 1 differential clock input mux 5 ps8805b 04/18/06 pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com packaging mechanical: 32-pin tqfp (fa) ordering information (1,2,3) ordering code package code package description PI6C4853111FAE fa pb-free & green, 32-pin tqfp notes: 1. thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. e = pb-free & green 3. x suffx = tape/reel seating plane 0.80 bsc .032 0.30 0.45 .012 .018 1.20 .047 0.95 1.05 .037 .041 x.xx x.xx denotes dimensions in millimeters 9.00 bsc .276 square 7.00 bsc .354 square gauge plane 1.00 ref .039 0.45 0.75 .018 .030 0.09 0.20 .004 .008 0 7 0.25 mm max . 0.10 .004 0.05 0.15 .002 .006 06-0052


▲Up To Search▲   

 
Price & Availability of PI6C4853111FAE

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X